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Department of Electrical and Computer Engineering

Misra, Durgamadhab

Contact Info
Title: Professor, Associate Chair for Graduate Studies
Email: durgamadhab.misra@njit.edu
Office: 339 ECEC
Phone: 973-596-5739
Dept: Electrical and Computer Engineering
Webpage: http://web.njit.edu/~dmisra/

About Me

Durgamadhab (Durga) Misra is a professor in the department of electrical and computer engineering at NJIT. In addition to his research and teaching duties, Misra has received National Science Foundation funding to support an undergraduate program at NJIT. The REU program, under Misra’s guidance, offers undergraduates the chance to gain hands-on experience in applied research at an early stage in their career development. As a result, students perform research leading to publications and conference presentations. The program has attracted minority and women students and has motivated many students to pursue graduate studies, motivated in part by working with doctoral-level students, who serve as mentors.

Misra received NJIT´s Excellence in Teaching Award in September 2005 for demonstrating excellence in the classroom and for encouraging and guiding students to work at their highest academic level. He has mentored many students through his participation in NJIT´s McNair Scholarship Program and has also participated in the Partners in Learning Program at NJIT, in which faculty constructively evaluate other instructors in the classroom.  

Education

  • Utkal University, B.S., 1978.
  • Utkal University, M.Sc., 1981.
  • Indian Institute of Technology, New Delhi, M.Tech., 1983.
  • University of Waterloo, M.Appl.Sc., 1985.
  • University of Waterloo, Ph.D., 1988.

Courses I Teach

RESEARCH PROJECT
GRADUATE COOP WORK EXPER I
GRADUATE COOP WORK EXPER III
GRADUATE CO-OP WORK EXP IV
VLSI DESIGN I
INDEPENDENT RESEARCH II
GRADUATE SEMINAR
MASTER'S PROJECT
DOCTRL DISSRTN & RESEARCH
DOCT DISSRTATION & RESRCH
PRE-DOCTORAL RESEARCH

Research Interests

VLSI DEVICES & PROCESSING

The current research topics are in the area of Reliability of High-K Dielectrics in nanoscale CMOS Devices. Reliability enhancement work is done by deuterium implantation before gate oxide is grown. This involves extensive device characterization such as gate oxide reliability, hot electron effect, interface states and low temperature characterization. Electrical characteristics of thermally evaporated hafnium oxide is currently being studied

 

VLSI Design

The VLSI Design research includes (i) A Synthesizable VHDL Model of the Exact Solution for Three Dimensional Hyperbolic Positioning Syste; (ii) On-Chip Implementation of Deadlock Avoidance in Wormhole Networks; and Transceiver design for sensors network.

Integrated Sensors

The other current topic is characterization and modeling of Three N-Type Implant Pinned Buried Photodetector using Charge Transfer Model for Ultra High Frame Rate Burst Image Sensors.

Remote monitoring of chemical sensors using local transceivers. 


Selected Publications

Editor

Physics and Technology of High-k Gate Dielectrics 4 ECS Transactions Vol. 3 No. 3, 2006, Pennington, NJ Science and Technology of Dielectrics for Active and Passive Photonic Devices ECS Transactions Vol. 3 No. 11, 2006, Pennington, NJ Dielectrics for Nanosystems II: Materials Science, Processing, Reliability, and Manufacturing ECS Transactions Vol. 2 No. 1, 2006, Pennington, NJ Physics and Technology of High-k Gate Dielectrics III ECS Transactions Vol. 1 No. 5, 2006, Pennington, NJ Physics and Chemistry of SiO2 and Si-SiO2 Interface-5 ECS Transactions Vol. 1 No. 1, 2005, Pennington, NJ Dielectrics in Emerging Technologies PV 2003-01, Pennington, NJ

Physics and Technology of High-K Gate Dielectrics - I PV 2002-28, Pennington, NJ  

Magazine Articles

High-k Gate DielectricsD. Misra, H. Iwai and H. Wong, Interface, vol. 14, No. 2, pp. 30-34, 2005. Electrical Techniques for the Characterization of Dielectric Films T. Kundu, R. Garg, N.A. Chowdhury and D. Misra, Interface, vol. 14, No. 3, pp. 17-19, 2005.

Journal Papers

Role of Hydrogen in Ge/HfO2/Al Gate Stacks Subjected to Negative Bias Temperature InstabilityN. Rahim and D. Misra, Applied Physics Letters, vol. 92, 023511, 2008. Charge Trapping at Deep States in Hf-Silicate Based High-k Gate DielectricsN.A. Chowdhury and D. Misra, Journal of Electrochemical Society, vol. 154, No. 2, pp. G30-G37, 2007. Trapping in Deep Defects under Substrate Hot Electron Stress in TiN/Hf-Silicate Based Gate StacksN.A. Chowdhury, P. Srinivasan and D. Misra, Solid-State Electronics, vol. 51, No. 1, pp. 80-88, 2007. Effect of Ge Surface Nitridation on the Ge/HfO2/Al MOS Devices Reenu Garg, D. Misra and S. Guha, IEEE Transaction on Device and Materials Reliability, vol. 6, No. 3, pp. 455-460, 2006. Effect of Nitridation on Low-Frequency (1/f) Noise in n- and p-MOSFETS with HFO2 Gate Dielectrics P. Srinivasan, E. Simoen, Z.M. Rittersma, W. Deweerd, L. Pantisano, C. Claeys, and D. Misra, Journal of Electrochemical Society, vol. 153, No. 9, pp. G819-G825, 2006. Impact of the Interfacial Layer on the Low-Frequency Noise (1/f) Behavior of MOSFETs With Advanced Gate Stacks F. Crupi, P. Srinivasan, P. Magnone, E. Simoen, C. Pace, D. Misra, and C. Claeys, IEEE Electron Device Letters, vol. 27, No. 8, pp. 688-691, 2006. Enhanced SiO2 Reliability on Deuterium-Implanted Silicon T. Kundu and D. Misra, IEEE Transactions on Device and Materials Reliability, vol. 6, No. 2, pp. 288-291, 2006. Gate Electrode Effects on low-frequency (1/f) noise in p-MOSFETs with high-k dielectrics P. Srinivasan, E. Simoen, R. Singanamalla, H.Y. Yu, C. Claeys, and D. Misra, Journal of Electrochemical Society, vol. 50, No. 6, pp. 992-998, 2006. Low-Frequency (1/f) Noise Performance of n- and p-MOSFETs with Poly-Si/Hf-Based Gate Dielectrics P. Srinivasan, E. Simoen, L. Pantisano, C. Claeys, and D. Misra, Journal of Electrochemical Society, vol. 153, No. 4, pp. G324-G329, 2006. Ge MOS Capacitors with Thermally Evaporated HfO2 as Gate Dielectric R. Garg, D. Misra and P.K. Swain, Journal of Electrochemical Society vol. 153, No. 2, pp. F29-F34, 2006. Charge Trapping in Ultrathin Hafnium Silicate/Metal Gate Stacks P. Srinivasan, N.A. Chowdhury and D. Misra, IEEE Electron Device Letters, vol. 26, No. 12, pp. 913-915, 2005. A Generalized Electron Transport Model in Photodetectors for High-Speed Imaging T. Kundu and D. Misra, Semiconductor Science and Technology, vol. 20, pp. 1122-1126, 2005. Impact of High-k Gate Stack Material with Metal Gates on LF Noise in n- and p-MOSFETs P. Srinivasan, E. Simoen, L. Pantisano, C. Claeys, and D. Misra, Miroelectronic Engineering, vol. 80, pp. 226-229, 2005. Si-SiO2 Interface Passivation Using Hydrogen and Deuterium Implantation T. Kundu, and D. Misra, Electrochemical and Solid-State Letters, vol. 8, No. 2, pp. G35-G37, 2005. Charge Trapping and Interface Characteristics of Thermally Evaporated HfO2 N. A. Chowdhury, R. Garg, and D. Misra, Applied Physics Letters, vol. 85, No. 15, pp. 3289-3291, 2004. Electrical Characteristics of Thermally Evaporated HfO2 R. Garg, N. A. Chowdhury, M. Bhaskaran, P. K. Swain and D. Misra, Journal of Electrochemical Society, vol. 151, No. 10, 2004. Screening of Si-H Bonds during Plasma Processing P. Srinivasan, B. Vootukuru, and D. Misra, Solid State Electronics, vol. 48, No. 10-11, pp. 1809-1814, 2004. Thermally Evaporated ZrO2 M. Bhaskaran, P.K. Swain and D. Misra, Electrochemical and Solid-State Letters, vol. 7, No. 6, pp. F38-F40, 2004. Interface Hardening with Deuterium Implantation D. Misra and R.K. Jarwal, Journal of Electrochemical Society, vol. 149, No. 8, pp. G446-G450, August 2002. Effect of Reverse Biased Voltage at Source and Drain on Plasma Damage D. Misra, IEEE Transactionon Electron Devices, vol. 49, No. 6, pp. 1090-1093, June 2002. Reliability of Thin Oxides Grown on Deuterium Implanted Silicon SubstrateR.K. Jarwal and D. Misra, IEEE Transactionon Electron Devices, vol. 48, No. 5, pp. 1015-1016, May 2001. Charge Transfer in a Multi-Implant Pinned-Buried PhotodetectorR.K. Jarwal and D. Misra, IEEE Transactionon Electron Devices, vol. 48, No. 5, pp. 858-862, May 2001. Metal-oxide-silicon diodes on deuterium-implanted silicon substrateD. Misra and R.K. Jarwal, Applied Physics Letters, vol. 76, No. 21, pp. 3076-3078, May 2000. Gate Oxides Grown on Deuterium-Implanted Silicon SubstrateD. Misra and S. Kishore, IEEE/ECS Electrochemical and Solid-State Letters, vol. 2, No. 12, pp. 637-639, December 1999. Charge-trapping properties of gate oxide grown on nitrogen-implanted silicon substrateD. Misra, Applied Physics Letters, vol. 75, No. 15, pp. 2283-2285, October 1999. Plasma Process-Induced Band Gap Modifications of Strained SiGe HeterostructureP.K. Swain, S. Madapur, and D. Misra Applied Physics Letters, vol. 74, No. 21, pp. 3173-3175, May 1999. Plasma Damage Immunity of Thin Gate Oxide Grown on Very Lightly N Implanted SiliconK.P.Cheung, D. Misra, J. I. Colonell, C-T. Liu, Y. Ma, C-P. Chang, W-Y-C. Lai, R. Liu and C-S. Pai, IEEE Electron Device Letters, vol. 19, no. 7, pp. 231, 1998.