By: Dr. Jie Chen, Division of Engineering, Brown University
Time: 04:45 PM, Thursday, November 4, 2004. (Free Pizza starting at 4:30 PM)
Place: Room 202, ECE Center, New Jersey Institute of Technology (NJIT), Newark NJ.

Abstract

The physical limitations of silicon devices prohibit further miniaturization. To overcome these limits, novel approaches to circuit and device design based on newly discovered physical phenomena, such as single electron devices, carbon nanotube building blocks and spintronic circuits, are being investigated. Nanoscale computing architecture and processor design poses two challenges, structural and signal faults, which must be confronted. 

We have developed a probabilistic framework for nanoscale circuit design that is inherently tolerant of structural and signal errors. This framework no longer requires a particular time instance of a logic signal to be correct, but only expects that the probability distribution of values will have the highest likelihood for valid logic states.  The appropriate mathematical framework for this type of analysis is the Markov Random Field, which was developed to support optimizing the values of a large set of random variables so that their overall joint probability becomes a global maximum.  We have applied the MRF to simple combinatorial logic gates. XOR gate using the MRF can tolerate up to 30% structural faults. This approach also demonstrates significant noise immunity. We have successfully simulated preliminary probabilistic test circuits for basic logic.  Results showed that MRF circuits can operate at very low supply voltages (0.1–0.2 V), and still achieve better fault immunity than conventional silicon designs. The proposed research also includes developing techniques to wire and position nanoscale devices using biological means, such as the self-recognizing capabilities of DNA. Our preliminary experimental results show that we can comb DNA strings on the meca substrate. We can also selectively change DNA’s conductivity to that of metallic or semiconductor wires.

Biography

Jie Chen received his Ph.D. degree in Electrical and Computer Engineering from the University of Maryland, College Park. He is currently an Assistant Professor at Brown University’s Division of Engineering. Dr. Chen's research interests include nanoscale devices and architecture design, genomic signal processing, and multimedia communications. He is a Distinguished Lecturer of IEEE Circuits and Systems Society (2004-2005). He has been invited as speakers in different conferences and workshops, and as the guest editors of two special issues, “Multimedia over IP” for IEEE Transaction on Multimedia, and “Multimedia over wireless networks” for EURASIP Journal on Applied Signal Processing. Dr. Chen has published 46 scientific papers in refereed journals, conference proceedings, and the book, “Design of Digital Video Coding Systems: A Complete Compressed Domain Approach” (New York: Marcel Dekker 2001); and co-edited another book “Genomic Signal Processing and Statistics” (EURASIP Book Series, 2004). He has invented or co-invented several U.S. patents. He is an associate editor for IEEE Signal Processing Magazine, and has been associated editors for IEEE Trans. on Multimedia and EURASIP Journal on Applied Signal Processing. He is a senior member of IEEE signal processing society.

For more information contact: Yun Shi shi@njit.edu (973)-596-3501, Alfredo Tan tan@fdu.edu (201) 692-2347, and Hong Man hman@stevens-tech.edu (201)-216-5038.